The present disclosure relates to electronic circuits and methods, and in particular, to low dropout regulator bleeding circuits and methods.
Voltage regulators are circuits that produce constant output voltages across a range of output currents. Such circuits are commonly used in electronic systems to provide a constant supply voltage to circuits that may draw different currents during various modes of operation. Low dropout (LDO) voltage regulators typically have a small difference between the input voltage applied to the voltage regulator and the output voltage produced by the voltage regulator.
FIG. 1 illustrates a typical LDO voltage regulator. LDO voltage regulator 100 receives an input voltage Vin on a first terminal of a pass transistor M7 and produces a regulated output voltage Vout on a second terminal of the pass transistor. Vout is sensed through a resistor divider (e.g., R1 and R2) coupled to one input of a differential amplifier comprising transistors M1, M2, M3, and M4. The other input of the differential circuit is coupled to a reference voltage Vref. M3 and M4 form a current mirror load. An output of the differential circuit is coupled to a common source circuit comprising transistor M5 to produce a voltage at node n3.
For nominal current loads, the gate of pass transistor M7 is driven by diode configured transistor M6. At nominal output currents, the impedance of M6 is sufficiently low to drive the gate of pass transistor M7. However, at low output currents, the drive impedance of M6 may become insufficient to drive the gate of pass transistor M7. To provide a low impedance to stabilize the loop, a natural device M8 with a low threshold voltage, Vt, is sometimes provided. M8 provides bleeding current into node n3 at low output currents when the voltage at n3 (and the gate of the pass device M7) is higher than a threshold Vt below the input voltage Vin, where M6 starts to turn off.
One problem with existing bleeding current techniques is that M8 may pass larger currents as the voltage on node n3 drops. For example, when the voltage on node n3 drops below Vin−Vt, M6 is fully on and provides a low impedance to drive M7, but the current in M8 increases dramatically as the voltage on node n3 goes down. FIG. 2 illustrates the increase in bleeding current in some existing LDOs. As the current through pass device M7 increases, or as the Vds goes down (when M7 is operating in the linear region as in the dropout mode of operation), the gate to source voltage, Vgs of M7 needs to grow to pass the required current. Thus, the gate voltage may be pulled down by the feedback loop, and the bleeding current through M8 may rise to unacceptably high levels as illustrated in FIG. 2.